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    Home » Placement Papers » Motorola Placement Papers » Motorola Palcement Paper

    Click here to Download 2008 Latest placement papers of this company

     

    Motorola  Placement Paper



    Today's Special: Get FREE SAP Magazine now!


       
      T here are Three streams 
     1 hardware ( sps)
     2 software (gsg)
     3 dsp
        ppt for 2 hours
         hardware 13 questions 1hour and 15 minutes                                    
        software 20 questions 
        Hardware questions

    Hardware questions


    1. Draw the state transition diagram for sequence detector for the sequence 011. if the first bit detected is zero then SCRH should be asserted when the second bit is 1 the SCRH should remain asserted when the third bit is 1 the FOUND should be asserted and the SCRH should be disasserted. No bits should be left.

    2. ts=0.5 and Th=0.7 (for the this is the setup time reqd and hold time reqd)
      buffer has the delay of 1nsec 
      what is the setup time _________ns
      what is the hold time ___________ns
        a.
                

               b.
                       

    1.   for Each gate delay time is 0.5 ns                                         
        

             a.  For each gate the delay time is 0.5 ns when will the glitch occur draw the glitch waveform.

              b. How the circuit should be modified to avoid glitch.

    1. describe the driving inverter? What inverter is weak and which has more strength? why?
        

    2. what is the output of the following circuit?

    3. Draw the output waveform for the following ckt   Vtp=Vtn=1V
         

    4. obtain expression for the output (the i/ps may not be in correct order)            

    5. Determine the output waveform  input is


             

             a.  What is the output waveform 
             b.  What will happen when the AND gate is replaced by OR gate           
                    

    1. using 2:1 Mux and one inverter make XOR gate

    2. using 2:1 Mux make a transparent latch (D f/f)

    3. Design a ckt such that f (clk_out)=2 f (CLK_in) that is frequency doubling circuit is needed
           

    4. Find the outputs of the following ckts
        

             a).   assume Vt = threshold voltage 

             b).

                            

       c). 

                 Software questions:
          
    Totally 20 questions were asked 
       * Most of them from C and datastructures (in equal nos)                    
       * few from c++

    1. Numbers sequential search has to compare ______ elements on worst and _______numbers on an average

    2.  

    3. Which of the following algorithm is not applicable for lived list representation of numbers
         1. binary search   2. Sequential search   3. Selection sort

    4. program to reverse a linked list all the variables 3 left pair of statements they give, we have to write the logic part 
      i.e. live 
      typedef struct link 
      {
      int element;
      struct link *next;
      }code;
      struct link rev(node *p)
      {
      node *t;
      node *r=0;
      while(p!=___)
      {
      t=____;
      p=_____;
      r=______;
      }
      return=______

    5. exactly same type of question to check whether the given string is palindrome or not

    6. they gave one program and asked what it is (it is fibonacci series)

    7. int i=7;
      printf(“%d”,i++*i++); what is the answer

    8. int i=7;
      printf(“%d”,i++*i++); what is the answer
      7. struct code
      { int I;
      int t;
      }
      /* some code */
      main()
      {

      }
      what is wrong ?
      semicolon is missing after structure declaration

    9. Selection sort  for N elements the no of comparisions needed and no of swapping 

    10. One question from heap sort

    11. One question about breadth search                                         

    12. what is a language 
      * set of alphabet 
      * combination of alphabet 
      * strings of some alphabet




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